Home
l
Downloads
l
Sitemap
l
Contact
> Home
 
DesignSoft™ - JPEG2000

Overview
 JPEG2000 is a wavelet based file format and is the emerging standard for coding and compressing images. DeignCore-JPEG2000 is a high performance image compression IP core that implements the lossless version of the ISO/IEC 15444-1 JPEG2000 image compression standard. The core supports lossless compression of up to 24 bpp RGB images. The core is modular and can be used as an encapsulated JPEG2000 encoder on FPGA. Alternatively, the computationally intensive parts of JPEG2000 can be selected and instantiated in FPGA with software running on an embedded processor. Dexcel also provides all the modules of JPEG 2000 in C Code for users to mix and match hardware and software for their embedded processor based FPGA solutions

Original image

10:1 Compressed image

300:1 Compressed image

   


   

Original Image 256X256, 24 bits per pixel File Size 192KB

Compressed Image 256X256, 24 bits per pixel File Size 109KB

   
Features
   
  • Modular Intellectual Property Core version for hardware implementations
  • Modular Software versions for Embedded Processor implementations
  • Modular lossless compression encoder
  • Support for error-resilient compression
  • Speed up to 40 MHz
  • Targeted to Altera Apex and/or Stratix family, Analog Devices BlackFin family
  • Modular lossless & lossy versions
  • Superior compression efficiency with excellent visual quality
  • Fully compliant to standards
  • Region Of Interest features
  • Rate Control
  • Compression Ratio up to 300:1
  • Maximum image size 2 31 *2 31
   
   
Highly Compressed picture with 300:1
   
Applications
  
   
  • Digital Still Camera
  • Security & Surveillance
  • Medical Imaging
  • Wireless systems
  • Internet image distribution
   
Functional Description
   

The JPEG2000 encoder operates on a rectangular size of an image called a tile. The encoder supports all images, which are of the size power of two. Tile size is configurable in the code as 32x32, 64x64 and 128x128 and can be fixed during synthesis, which decides the size of the tile memory.

The input to the core is tiled data. The remaining operations such as level shifting, color space transformation, wavelet transformation, biplane modeling, arithmetic coding and packetization will be performed by the core.

Dexcel's JPEG2000 encoder's internal operations perform the loss less reversible two-dimensional 5/3 -wavelet transform on level-shifted input pixels. The transformed coefficients are stored back in the tile memory. The EBCOT engine reads the data in the code block format and the entropy engine generates the encoded bytes. The packetizer adds the required header and tile information and outputs the data in serial as well as parallel format.

   
Functional Block Diagram
   
   
Some of our unique advantages are
   
  • End to end product realization capability covering board and FPGA design, board support packages and firmware development
  • Device drivers and Graphical User Interfaces
  • Excellent mathematical background to understand algorithms that are used in media compression, communications and cryptography which are fast becoming essential elements of modern day products
  • Well laid out development process which provides complete transparency to the customer.
  • A wide list of pre-tested design objects that can reduce design time
   
Deliverables
   
  • VHDL source code
  • Post Synthesis Net list
  • Test Bench
  • Benchmark Images for Testing
  • Documentation
  • Licensing of C source codet
  • Porting and Optimization on DSP platforms
  • Licensing of the Blackfin DSP versions of jpeg2000 & JPEG
  • Develop proprietary version
  • See the jpeg2000 on Blackfin brochure for details of performance, APIs supported, etc