Basic Altera FPGA Design is an introductory level program that will provide the participant with an exposure of Altera FPGA architecture, Altera Quartus II tool usage for design entry, compilation and simulation, digital circuit description with VHDL and Altera FPGA debugging tools
Audience: Fresh or experienced engineers who are interested to get introduced to FPGA design
Prerequisite: B.E./BTech in CS/E&C/E&E/IT/Telecom or MSc Electronics/CS
Duration of the course: 4 days (9.30am to 6.00pm)
Key Benefit: This course is designed to introduce engineers to the interesting field of FPGA design. The candidates who successfully undergo this training would be able to design a simple digital system using FPGA with VHDL, simulate the design with Altera Modelsim to verify the functionality, implement the design on FPGA board and debug the design issues. This course is also highly recommended for the candidates with prior work experience in other domains of electronics hardware design and plan to switch their project/domain to FPGA platform.
Course Contents
Intermediate Altera FPGA Design is a specially designed program that is suitable for FPGA design engineers with 1 or 2 years of experience. This course will expose the participants to the advanced VHDL topics, timing analysis and embedded soft processor based system design with Altera Qsys environment and NIOS II processor.
Audience: 1-2 year experienced engineers with good acquaintance of basic FPGA design
Prerequisite: B.E./BTech in CS/E&C/E&E/IT/Telecom or MSc Electronics/CS and basic knowledge of FPGA design and debugging.
Duration of the course: 4 days (9.30am to 6.00pm)
Key Benefit: This course is intended to expose the engineers in the field of FPGA design with advanced techniques of writing accurately synthesizable VHDL code, advanced FPGA design simulation with test bench, and designing systems with embedded soft processor. After the successful completion of the course participants would be able to do effective VHDL coding, do advanced simulation with Modesim and design basic NIOS II based systems on Altera FPGA platforms.
Course Content
Advanced Altera FPGA Design is a program that is designed for advanced FPGA design engineers and embedded software with 2 to 4 years of experience. This course will expose the participants to the advanced optimization techniques for Altera FPGA design, interfacing high speed DDR memory with FPGA, porting uC Linux on NIOSII and best practices to improve FPGA design productivity.
Audience: Experienced engineers who are acquainted with intermediate level FPGA design.
Prerequisite: B.E./BTech in CS/E&C/E&E/IT/Telecom or MSc Electronics/CS, moderate knowledge of FPGA design, debugging and NIOS II embedded soft processor.
Duration of the course: 4 days (9.30am to 6.00pm)
Key Benefit: This course is intended to expose the engineers in the field of FPGA design with advanced FPGA design techniques for timing, power and resource optimization, introduce them to high speed memory interfacing like DDR, porting uC Linux on embedded soft processor NIOSII and specialized topics to improve the productivity of FPGA designs. The uC Linux porting training is highly recommended for embedded software engineers who are planning to work on FPGA platforms.
Course Content
Basic Embedded Hardware Design is an introductory level program that will provide the participant an exposure to the basics of embedded hardware design covering understanding of hardware design document, component selection, schematic design, CAD design, Fabrication techniques, Assembly and testing process
Audience: Fresh or experienced engineers who are interested to get introduced to embedded hardware design
Prerequisite: B.E./BTech in CS/E&C/E&E/IT/Telecom or MSc Electronics/CS
Duration of the course: 7 days (9.30am to 6.00pm)
Key Benefit: This course is designed to introduce engineers to the field of embedded hardware design. The candidates who successfully undergo this training would be able to design a simple PCB, test the fabricated board, contribute in board bring up and verification of the functionality and debugging the design issues. This course is also highly recommended for the candidates with prior work experience in other domains of electronics hardware design like FPGA design and plan to expand/switch to PCB design.
Course contents:
Advanced Embedded Hardware Design is an advanced level program that will provide the participant an exposure to the advanced topics of embedded hardware design covering understanding of system requirement specification (SRS), top level architecting, power supply estimation, creating hardware design document (HDD) from SRS, advanced topics in power supply design, digital and analog I/O, high speed memory interface and high speed serial interfaces. This course also covers advanced topics in system design namely Signal Integrity, Thermal and EMI/EMC analysis
Audience: 2to 3 years experienced embedded hardware engineers who are interested to get into next level of embedded hardware design
Prerequisite: B.E./BTech in CS/E&C/E&E/IT/Telecom or MSc Electronics/CS
Duration of the course: 7 days (9.30am to 6.00pm)
Key Benefit: This course is designed to expose the hardware engineers to the advanced topics of embedded hardware design. The candidates who successfully undergo this training would be able to understand the SRS, make HDD, perform system power estimation, devise advanced power converters, design with advanced digital & analog I/Os, memory and serial interfaces. Most importantly this course introduces the participants to the critical part of hardware design i.e., SI, Thermal and EMI/EMC analysis.
Course Contents
